This invention relates to radio frequency processing, and more particularly, this invention relates to radio frequency processing with phase lock looped circuits.
The use of wireless conductivity devices are becoming more commonplace in industry. For example, cellular networks are prevalent throughout the world. Also, wireless local area networks are becoming increasingly popular in certain areas. Many of these wireless applications use frequencies that exist within the frequency bands that do not require a site license from the Federal Communications Commission. An example of such a band exists at around 2.4 GHz, an unlicensed application space established by the FCC.
One wireless application is a wireless cable replacement. For example, a wireless cable replacement would allow a computer keyboard to connect to a computer without the use of physical wires. It would be similar to an infrared application, but instead use radio frequencies, instead of light.
However, it is difficult to operate at the higher GHz frequencies using small monolithic circuits. The higher frequencies typically require separate chips and circuits. It would be desirable if a majority of a transceiver radio frequency processor could be incorporated monolithically and a simple design could be implemented that would allow a smaller number of components. This would be beneficial in the processing of intermediate frequencies that would be processed in such a system.
In accordance with the present invention, an apparatus for radio frequency processing includes a local oscillator synthesizer circuit having a voltage controlled oscillator that generates an oscillator signal f1. A divide-by-N circuit receives the oscillator signal f1 and generates an f1/N oscillator signal. A receiver circuit and transmitter circuit are operatively connected to the local oscillator synthesizer circuit for respectively down converting/up converting radio frequency signals. The transmitter circuit includes a heterodyne frequency translation loop circuit and receives the f1/N oscillator signal in a mixer that receives the oscillator signal. A receiver circuit includes a first mixer for receiving a radio frequency signal. The oscillator signal and a quadrature image reject mixing circuit receive the f1/N oscillator signal.
A modulator/demodulator phase locked loop circuit is connected to the transmit and receive circuit and demodulates and modulates radio frequency signals. A transmit/receiver switch is operatively connected to the receiver circuit and the modulator/demodulator phase locked loop circuit for switching between a transmit and receive mode of operation. The heterodyne frequency translation loop circuit further comprises a phase detector, voltage controlled oscillator and a mixer that receives the f1/N oscillator signal.
The apparatus for radio frequency processing of the present invention in another aspect includes a modulator/demodulator phase locked loop circuit for generating a second intermediate frequency signal having a frequency of about f3. A heterodyne frequency translation loop circuit receives the first intermediate frequency signal and outputs a first intermediate frequency signal having a frequency of f2. A transmit mixer receives the first intermediate frequency signal and outputs a transmit radio frequency signal having a frequency fo. A synthesizer circuit is operatively coupled to the transmit mixer and the heterodyne frequency translation loop circuit and generates an oscillation signal having a frequency f1 to the transmit mixer and the heterodyne frequency translation loop circuit. This oscillation signal is divided down by a factor N before passing into the heterodyne frequency translation loop circuit.
In another aspect of the present invention, the modulator/demodulator, heterodyne frequency translation loop circuit and transmit mixer are monolithically formed. In yet another aspect of the present invention, the synthesizer circuit comprises a frequency hopping local oscillator synthesizer circuit having a phase detector and voltage controlled oscillator in loop with the phase detector. A reference signal generator is operatively connected to the phase detector of the frequency hopping local oscillator circuit for generating a reference signal xcex94Fo/(1+1/N) to the phase detector.
The modulator/demodulator phase locked loop circuit also includes a phase detector, voltage controlled oscillator and a summing circuit operatively connected to the phase detector and the voltage controlled oscillator. The modulator/demodulator phase locked loop circuit also includes a transmit/receive switch for switching between a transmit function for receiving transmit data within the summing circuit and a receive function where no transmit data is received. In yet another aspect of the present invention, a high pass filter receives the transmit radio frequency signal and has a cut-off frequency (f1xe2x88x92f2). The transmit radio frequency signal is a GFSK modulated signal of about 2.4 GHz in the ISM band.
In yet another aspect of the present invention, a first receive mixer receives a radio frequency signal and a transmit/receive switch is operatively connected to the first receive mixer and the transmit mixer for switching between the first receive mixer for a receiver function and the second transmit mixer for a transmitter function. A second receive mixer circuit has a quadrature image reject mixing circuit operative with sine and cosine signal components. The first receive mixer and image reject mixing circuit are operatively connected to the synthesizer circuit for receiving the oscillation signal. This oscillation signal is divided down by a factor N before the image reject mixing circuit. A transmit/receive switch is operatively connected to the second receive mixer circuit and the modulator/demodulator phased lock loop circuit for switching between a transmit function where a reference signal is received within the modulator/demodulator phase locked loop circuit and the receive function where the second receive mixer circuit is operatively connected to the modulator/demodulator phase lock loop circuit.
The quadrature function image reject mixing circuit includes mixers operative with sine and cosine signal components. The modulator/demodulator phase locked loop circuit, heterodyne frequency translation loop circuit, first receive mixer, second receive mixer circuit and transmit mixer are monolithically formed.